ATOM

We will begin in a moment. I'd like to remind everyone that this call and webinar are being recorded, and a replay will be available on Atomera's IR website for one year. I'm Mike Bishop with the company's investor relations. As in prior quarters, we are using Zoom, and we will follow a similar presentation format with participants in a listen-only mode. We will open with prepared remarks from Scott Bibaud, Atomera's President and CEO, and Frank Laurencio, Atomera's CFO. We will open the call to questions. If you are joining by telephone, you may follow a slide presentation to accompany our remarks on the events and presentations section of our investor relations page on our website. Before we begin, I would like to remind everyone that during today's call, we will make forward-looking statements.

These forward-looking statements, whether in prepared remarks or during the Q&A session, are subject to inherent risks and uncertainties. These risks and uncertainties are detailed in the Risk Factors section of our filings with the Securities and Exchange Commission, specifically in the company's annual report on Form 10-K filed with the SEC on February 24th, 2026. Except as otherwise required by federal securities laws, Atomera disclaims any obligation to update or make revisions to such forward-looking statements contained herein or elsewhere to reflect changes in expectations with regards to those events, conditions, and circumstances. Please note that during this call, we will be discussing non-GAAP financial measures as defined by SEC Regulation G. Reconciliations of these non-GAAP financial measures to the most directly comparable GAAP measures are included in today's press release, which is posted on our website.

With that, I'd like to turn the call over to our President and CEO, Scott Bibaud. Go ahead, Scott.

Thanks, Mike. Good afternoon, everyone. This quarter, we made solid progress with multiple customers across our highest value markets, while also expanding the breadth of applications where MST can solve real current pain points for the semiconductor industry. We're seeing strong customer pull in advanced logic, memory, in wide bandgap materials like GaN and power, and in RF, areas that are being shaped by the rapid growth of AI infrastructure, which is driving the need for better power efficiency, signal integrity, and system performance. Today, I'll start with an update on Gate-All-Around, where we've been working closely with customers and our strategic partners to validate MST in these advanced geometries. I'll touch on our customer pipeline and close with updates on GaN, giving insights on some exciting new technical results that are shaping near-term opportunities.

As we've said before, the move to Gate-All-Around at 2 nanometers and beyond is one of the most important architectural transitions in the industry, and it's also one of the most difficult manufacturing environments since fabs must build incredibly complicated structures at line widths of 5,000 times smaller than a human hair, where a small amount of atomic migration can cause big problems. Gate-All-Around transistors are the building blocks for AI infrastructure, and dopant diffusion control is critical to their effectiveness in terms of performance and reliability. The industry is demanding clear proof that any new material can be deposited precisely and that it delivers measurable benefits in advanced silicon devices. Today, there are 4 companies in the world developing Gate-All-Around transistors, TSMC, Samsung, Intel, and Rapidus.

We know that each of them can use the capabilities of MST, so it's our goal to achieve adoption at all four. Further, as these companies transition to the generation beyond Gate-All-Around, called CFET, our technology becomes even more essential, so working with us now is in their best interest long term. In our last earnings call, we had just received measured silicon results that prove MST is the best solution for a critical source drain liner application in these small geometry transistors. At this point, we're actively working on evaluations of our technology with two of our target Gate-All-Around customers, and discussions are underway with the others. It is typical that a customer asks to conduct multiple demonstrations before agreeing to accept a new technology for implementation in their fab's wafer flow.

These demonstrations help to validate our claims while simultaneously addressing the detailed implementation and functionality questions these customers are focused on solving. We also expanded the scope of our work with our strategic development partner this quarter, which is important because it strengthens both our technical velocity and our credibility with the ecosystem. Their test and development infrastructure helps us generate the kind of data that advanced node customers insist on seeing before engaging, and their endorsement will certainly help us engage a broader set of teams within each target account. Each of the large memory manufacturers are facing similar challenges to the Gate-All-Around customers as they develop their next-generation transistors in DRAMs and High Bandwidth Memories. Our team is in discussions with them right now, and we are currently working on multiple solutions using MST to assist in this area.

Right now, memory manufacturers would do almost anything to get greater fab capacity, and they have the resources to evaluate different methods of doing so. We hope to take advantage of that opportunity with solutions enabled by MST. The momentum we're seeing in the advanced node transistor space is a result of many years of work targeting current market trends. The macro challenges that AI success has put front and center, capacity and performance of CPUs, GPUs, logic and memory, the power demands of cloud providers, and the increased costs associated with these are all areas that Atomera can help solve. For that reason, we believe that MST is a fundamental tool for the future of AI. Our customer pipeline remains very active across multiple domains. For example, our work with our large IDM customer continues to go well, and we expect additional results from wafer runs soon.

Our efforts with STMicroelectronics are bearing fruit. We are confident we will re-engage with them again in the near future, consistent with our view that MST can create value across multiple product lines, especially in a large diversified IDM or foundry. In RF SOI, we are seeing strong results confirming our extensive TCAD simulations. The technical results we've been focused on, including for both power switch and LNA, have been confirmed through customer silicon runs. The near-term question is less about performance and more about the most efficient path to commercialization, particularly in cases involving fabless licensees, where aligning the business structure with the manufacturing flow can be complex. In power devices, we're seeing excellent potential. New development work being done to target MST at both TrenchFET and HBT transistors, useful in high frequency, high speed, and high voltage applications.

At the same time, wafers continue moving forward with our second JDA partner, and we'll keep pushing those efforts toward a production pathway. Turning to GaN, we made meaningful advancements this quarter, including a breakthrough that could give us a technical leadership in RF GaN on Silicon to augment the advantages previously outlined for power GaN on Silicon. To explain the innovation, I need to give a little background. GaN on Silicon is a much more economical growth method than alternatives built on exotic substrates like silicon carbide or sapphire. When GaN on Silicon is manufactured, due to the GaN stack growth process, gallium and aluminum ions gather at the silicon substrate interface, forming an unwanted sheet charge layer called a parasitic channel, which is well known to limit RF performance in GaN on Silicon applications.

In fact, its elimination has been the subject of materials and growth studies for more than 20 years. In the past few weeks, we received preliminary performance data suggesting MST can dramatically reduce the parasitic channel. It does this by using MST's fundamental interface engineering to block the gallium and aluminum ions from getting into the silicon substrate. An industry veteran told us that in his 20 years, this is the best measured sheet charge data he has ever seen. We're continuing to validate this very promising discovery with our test and measurement partners. RF GaN-on-Silicon is a value in the wireless infrastructure, military, defense, and satellite markets. It's also being actively evaluated for high integrated RF front ends, such as those for 6G cellular. The market potential is large and growing fast.

We are actively engaging on both 200 millimeter and 300 millimeter wafer sizes in GaN, depending on our customer's requests. That matters because the wafer size for GaN-on-Silicon is one of its key advantages leading directly to a customer's path to high volume production, low cost structure, and a set of fabs that can support ramp, including opening doors for new applications with conventional silicon fabrication methods and devices. We are seeing expanded interest in partnerships across the ecosystem, including engagements involving Incize, Synopsys, Texas State University, Sandia, and others. Those kinds of parallel paths, commercial customers plus research and ecosystem partners, can compress development cycles and accelerate the time from promising materials data to something customers can qualify and deploy. Work here is aimed at generating data that is both technically rigorous and directly translatable to customer device requirements.

Finally, a quick note on our announcement last week about expanding our collaboration with Synopsys. We've worked with Synopsys for years to enable accurate modeling of MST inside the Sentaurus TCAD environment through our MSTcad tool set. This expanded collaboration extends that relationship into GaN workflows for both high-value RF and power devices. Practically, this means we're working closely with Synopsys to provide feedback on their GaN models, and we'll be jointly developing marketing materials so customers and partners can evaluate the physical and electrical effects of MST and GaN more quickly and with higher confidence. To summarize, we're making progress where it matters, expanding and deepening Gate-All-Around engagements, broadening GaN from power into RF with concrete technical innovations, and continuing to advance multiple customer programs across our pipeline.

We remain focused on converting technical validation into commercial structures that can drive repeatable revenue and are confident in our ability to do so. This is indeed an exciting time for Atomera. With that, I'll turn the call over to Frank, our CFO, to review our financials.

Thank you, Scott. At the close of the market today, we issued a press release announcing our results for the first quarter of 2026, and this slide shows our summary financials. Our GAAP net loss for the first quarter of 2026 was $6.1 million, or $0.17 per share, compared to a net loss of $5.2 million, which was also $0.17 a share in Q1 of 2025. On a non-GAAP basis, net loss last quarter was $4.9 million or $0.14 a share. Our Q1 2025 net loss was $4.4 million or $0.15 a share. GAAP operating expenses were $6.2 million in Q1 of 2026, which was an increase of 742,000 from $5.5 million of GAAP operating expense in Q1 2025.

Stock compensation expense, which is excluded from non-GAAP results, increased by $397,000, primarily due to new hires and our adoption in Q1 2025 of Performance Stock Units or PSUs for executives. PSUs vest over 3 years, whereas the time-based options and RSUs that we had previously granted to executives vested over 4 years. Although the vesting period is shorter, PSUs vest only if our stock performs well relative to the Russell 2000. The first tranche of PSUs issued in Q1 2025 lapsed without vesting because we did not hit the required stock price performance threshold. With the exception of stock compensation expense, the drivers of GAAP and non-GAAP expenses are substantially the same. I will drill down into other factors that impacted our expenses by focusing on non-GAAP numbers.

Please refer to the slide presentation for a reconciliation between GAAP and non-GAAP results. Non-GAAP operating expenses in the first quarter were $4.8 million, a year-over-year increase of $348,000 from $4.4 million in Q1 2025. Sales and marketing expense increased by $203,000, reflecting our two executive hires since October. R&D expenses increased by $127,000 from $2.8 million in Q1 of last year to $2.9 million in the first quarter of this year, primarily due to higher spending on outsourced engineering to support the wafer runs for our Gate-All-Around engagements, our IDM customer, and our JDA customer, which drives spending on metrology. G&A expenses were basically flat from the first quarter of last year.

Turning to sequential quarterly results, first quarter 2026 non-GAAP net loss was $4.9 million or $0.14 a share, compared to net loss of $3.3 million or $0.10 a share in Q4 of 2025. Operating expenses were $4.8 million in Q1, which is a $1.6 million increase from $3.2 million in Q4. Let me offer some color on the magnitude of this sequential increase. As I explained on our last quarterly call, our compensation committee elected not to pay the full 2025 executive bonus, withholding approximately $669,000, which normally would have been paid out in January. The committee provided the executive team the opportunity to earn back the withheld amount in 2026 upon achievement of commercial objectives.

This led to us reversing accrued bonus expense in the fourth quarter, which skews the comparison of expenses between Q1 and Q4. Our balance of cash equivalents, and short-term investments on March 31, 2026 was $41.1 million, compared to $19.2 million on December 31, 2025. We used $4.6 million of cash in operating activities during Q1, compared to $3.2 million in Q4 and $4.8 million in Q1 of last year. As is typical for us, cash use in the first quarter of every year is higher than other quarters due to payments for items that are expensed over the year.

In February of this year, we closed on a $25 million registered direct stock offering, selling 5 million shares of common stock at $5 per share, netting us proceeds of $23.6 million after fees and expenses. Prior to this offering, we had also raised $3.2 million in Q1 by selling approximately 1.3 million shares under our ATM at an average price of $2.47. Currently, we have 38.7 million shares outstanding. With the proceeds of our equity offering, we feel that our current cash balance puts us in a strong position to execute on the opportunities ahead of us, but we will continue to be disciplined about controlling our costs.

On our last call, I said that we expected our 2026 annual non-GAAP OpEx to be approximately $18.5 million. We are holding to that number. To reiterate, the reason why the expense increase appears as large as it does over $15.9 million of OpEx in 2025 is the bonus deferral, which essentially shifted expenses out of Q4 and moved them into 2026. Organic increases in spending mainly relate to the hiring of our VP of Sales in Q4 last year and our VP of Marketing in Q1. Revenue in Q1 was $11,000 and consisted of fees for wafer deliveries to the large IDM that Scott talked about.

We have $96,000 of deferred revenue on our balance sheet. Approximately $46,000 of revenue that we expected to recognize in Q1 pushed out to Q2 because wafer shipments that we anticipating making last quarter pushed out to early this quarter. Accordingly, we expect Q2 revenue to be in the range of $50,000-$100,000. With that, I will turn the call back over to Scott for a few summary remarks before we open the call up to questions. Scott?

Thanks, Frank. Before I take questions, I wanna thank our employees, our customers, and our shareholders for their continued support. We're excited about the progress we're making, and we remain focused on translating our growing body of simulation and customer silicon evidence into commercial agreements that can drive long-term repeatable revenue and a strong, sustainable business. Mike, we will now take questions.

Thank you, Scott. If you wish to ask a question, please click the Q&A button at the bottom of the Zoom window, then feel free to type in a question. I will do my best to aggregate the incoming queries and relay them to management. Alternatively, you can click the raise hand button, and we may call on you to ask your question live. Right now, looks like Richard's ready to ask a first question. Richard, please go ahead.

Hi, Mike. Thanks, thanks, Scott and Frank. Mike, can you hear me? Just wanna make sure the audio's okay.

Yeah, yeah, we can hear you, Richard, thanks.

All right, great. Scott, the Gate-All-Around stuff here, you made some very interesting comments. I wanna touch on a few of these things here. You mentioned that you now have measured silicon results here, and your customers have said that they're better than the other solutions that they have here. Just wanna make sure that that's what you said, and then I'll have a couple follow-ups on that topic.

yeah, you may be Are you talking about GaN or Gate-All-Around?

Gate-All-Around.

On Gate-All-Around, we do have measured silicon results, and we evaluated our results against another method that people in the industry are using to accomplish the same type of thing we're doing, and our results are a significant improvement. Yes, we have definitely had that, and we're showing that to customers.

Okay.

What more can I say?

Yeah, to follow up on this, the measures I assume that the measured results or wafers run at one of these four targeted customers. Is that correct?

Um, in that-

Is this independent?

The measured results are something that we did in conjunction with our strategic partner, where they had Gate-All-Around structures. We used those devices to grow MST on those Gate-All-Around structures in the wafer. We were able to conduct this testing.

Okay. All right.

Now that's if you think about how we approach customers, we go out and we show customers our simulation data, which we can do without a strategic partner, but then having silicon-tested data is a massive improvement over that. That's been able to really open the doors for us to get into the customers. The next step from there is the customer will typically say, "Okay, we can see you did that on your strategic partner's structure. Now we want you to do it on our structure," 'cause our structure is different. Everybody's is different.

When I mentioned that we have work underway with two of the target customers there doing demonstrations, that's the step we're at, where we're trying to do implement our technology on their structures and show them that.

Okay.

We believe that the step after that, Richard, will be that they'll have to install MST in their fabs to do any further testing because these structures are so small and hard to manufacture that it's difficult to do a lot more work by having us run demonstrations in our fab.

Okay. To that point, do you have a commitment to attempt to do this on your customer structures, or is this the discussions to get that agreed to?

We're working on it with 2 of them, actually, I don't know what you mean by commitment, but I guess they're sending us wafers and we're putting our stuff on it.

Okay.

Yeah, that's pretty committed.

Okay. Okay. That sounds pretty good. What's the timeframe for this work to get done? I assume, given what I've heard for the many years that I followed you guys, that the analysis of these can often take a while, and these are more complex than most. I would assume that analysis takes a while. What's kind of the turnaround time between getting that done, analyzing, and getting to that next step? What do you foresee that taking?

Yeah. It's gonna take several months, just us doing the work. We have to really do a lot of development work to just figure out how to grow things effectively in these tiny devices that they're sending us. Normally when someone sends us wafers, within 3 weeks to 1 month, we can turn those around and send them back. In this case, my guess is it might take us longer than that, 2 to 3 months. When we send them back, they have to put them in their fab and run them for several months. It could be in the order of 6 months before we start to see results coming out of this.

Okay

I mentioned a few times on the call in both structural analysis, which is where they are looking at what we did for deposition in those structures and making sure that what we did was appropriate. They can do that pretty quickly 'cause you're taking TEM images like electron microscope images and looking at what we did. Those results will come quickly, but the electrical results will be the result of running the wafers through the whole line.

Got it. Okay. You're expecting or expecting to run wafers with wafers from two different GAA customers then over the next few months?

Yes.

Okay. Going back to my first question here and understanding the results you measured with the runs you did with your, you know, equipment partner, I want to get a sense of whether the customers agree that the comparisons you've done with an, I think an industry standard approach to dope and diffusion, they actually agree with that as well, that that is much better than what they've been, what they can get internally or is this just what your equipment partner has concluded for you?

I think there's no doubt that the customers that we've been able to engage with and get down to lots of details on it, they have been impressed enough that they want to move forward with these further demonstrations. Yeah, they definitely saw the benefit of using MST to conduct, to block the dope and diffusion in the areas that we're talking about, and how it works better than what they're currently implementing.

Okay. Okay, fair enough. Some really interesting stuff going on there. Thanks for all that detail, Scott. Maybe a couple other quick questions. On the DRAM side, it sounds like we've made some progress here, but if I'm to compare that with the progress on the logic side to the memory side, it sounds like the logic is reasonably farther ahead than memory. Is that a fair comparison?

Yes, that's true. We are talking with the memory manufacturers and they, one thing, memory is quite a different architecture than logic that they're using Gate-All-Around. In memory, they're having the same type of dope and diffusion problems with their newer architectures as the Gate-All-Around folks are, and our technology's directly applicable to that. We have a lot of interest in, from the DRAM guys about that. We're also talking to them about some other solutions that may be able to help them in different ways. It's lots of different vectors of how we're engaged with DRAM guys. I should say with the memory guys, because it's also on High Bandwidth Memory, not just DRAM. We're further ahead with the Gate-All-Around customers than we are with them.

Okay. All right. Fair enough. Maybe a question on the GaN side here. I think before you, my recollection is you're talking more about applications of GaN into the power space, but more recently it's been in RF here.

Yeah.

How would you characterize kind of the, which one is kind of the leader in terms of getting to the next step here and, you know, getting, you know, installation licenses? I know that's not the right term, but it's kind of what I think of it. You know, installation licenses or using the wafers with that already built in there.

Yeah

Which one's kind of in the lead here, if either one is notably better?

Okay. It's kind of interesting where you're right saying that we initially targeted the power market for our GaN-on-Silicon work. The power market is actually much larger than the GaN on RF market today. That's one of the reasons why we targeted it first. For the power market, our big value that we've been talking about is to improve crystal quality and therefore to allow people to manufacture on larger wafers because there'd be less bow and warp as they were growing the GaN and fewer defects, and therefore.

would have a lot of inherent value. The only challenge with that is to validate all that work, you actually have to build wafers and build electrical devices and do a lot of testing, so that takes some time. Everybody's GaN growth properties are different, so there's some tuning that has to happen. That takes time. The new things I just mentioned, GaN on RF, we got some test data and we just spoke about it at a big compound semiconductor conference last week, and there is huge amount of interest in it in the industry.

Just looking at this early data that we got, now it has to be validated and so forth, but just looking at that data could be enough for someone to adopt us because it's such a big breakthrough and such a area where the industry needs solutions. In RF, they don't actually have to do the full electrical testing before they can decide to move forward on something. It could be that we're moving, although we're earlier into the GaN-on-Silicon for RF market, that one could move faster.

Okay. All right. Fair enough. One last question from me. Maybe going back to STMicro here, I'm not sure if this is the who you're now referring to, the IDM customer or not here, so maybe correct me if I'm misassuming that here. Maybe just kind of indicate where we're sitting here with those guys, and obviously with putting a pause on the power stuff that you're hoping to move forward with that you talked about late last year. How about in the other applications with them? Are they still moving as full force as you had expected and had been seeing since the cessation of the power work with them?

Yeah, just to clarify, when I talk about the IDM, it's not STMicro.

Okay.

STMicro is another IDM, and we think we have a lot of different areas where we can engage with STMicro, but that's a separate engagement. Yeah, we've been talking with multiple business units over there and been doing some work, some evaluation work, and we have recently got some results that lead us to believe that we're going to start re-engaging with them on developing a product. We aren't at the point where we can talk about that yet. ST hasn't specifically given us any okay to talk about it.

Yeah, we've been saying since we had to give that unfortunate news about the BCD program at ST that we were working with other groups and that our relationship with the company was great, and the thing is, they really know and understand MST technology and have seen it, and they believe in it. This is kind of vindication of those comments that we've been making. Now, I haven't been able to announce a new deal with them yet, but we hope to be able to do that in the future.

Okay. Excellent. I will jump out of line, guys. Thank you very much.

Thanks.

Okay. Thanks, Richard. There are a few questions that have been asked in the Q&A line, and I'll just bring them up one by one. The first kind of question's about the Gate-All-Around, and it's that given the evaluation periods that we've seen in other areas of Atomera, are there specific milestones that need to be hit to convert these Gate-All-Around customers into JDA? What's a realistic timeframe for such a conversion?

Yeah. At a high level, I'll put a little bit more structure on what I showed, I talked about Richard before. It's typical that customers will wanna see kind of four different levels. They wanna see TCAD results that show that you have the potential to deliver performance, and they have to understand all the TCAD background and believe in it. They'll move ahead and say, "We wanna see that captured on silicon." We've done those two steps in Gate-All-Around. The next step, they'd say, "Okay, we wanna see that captured in silicon, but on our silicon, on our structure. We're gonna send you guys wafers.

We want you to deposit it on our structure and send it back to us, and we'll evaluate it. They know they're not gonna get the most perfect performance out of that because, you know, there's work we have to do together in tuning them up and getting everything to work fully integrated. They're just trying to do a proof of concept on their platform, right? That's the stage we're at right now with 2 of the customers. Beyond that, the stage after that would be where they install and do the actual implementation on their device, tuning it all appropriately. Yeah, it's a fair question to say when should we expect to see a JDA.

Sometime in this period of us doing the evaluation on their devices, and when we get to the point we'll install there, 'cause that would involve a license, then we should be having a JDA in place. These companies do not move fast when you're talking about kind of legal agreements. We're working hard to make those happen, and we hope to be able to announce them at some point in the near future.

Okay. Thank you. Frank, the question regarding the equity raise.

The investor asks, he is curious about the background and reason for the third-party private placement, and, given the stock price rise, was that, you know, could we have had better timing?

Right. Yeah, thanks for that. You know, one of the comments I've made in talking about the capital that we raised in Q1 was some funding that we got via the ATM, and if you look at that, the average price on that was $2.47, which is roughly about where we were trading about a week and a half or two before we did the equity raise. The $5 price that we executed on there, you know, given what we had seen so far, not only in Q1, but really looking back over the last couple of years, it made us look at this as a very good opportunity because sure, the stock had run up to $7, and now in the last couple of weeks it's run up again.

You know, given, the past trading levels that we had and again, a lot of geopolitical uncertainty in the middle of February, you know, which we've kind of seen play out since then. Of course, you can't know how the equity market's gonna perform, but on balance it seemed like a very good opportunity for us to execute on that and then frankly be able to work, you know, toward commercial outcomes and not worry about the day-to-day movements in the stock price to have to use the ATM to keep our balance sheet strong. We've now strengthened the balance sheet. It's always kind of easier in with the benefit of hindsight to second-guess the price, but I think it was a very good decision to execute then.

Okay. Thank you, Frank. Question on the tool partner. How has your relationship evolved with your, you know, with your tool partner, the strategic partner? Are they giving you more engineering personnel, and how has that relationship changed over time?

Yeah, that's a good question. We have been, you know, we try to be good partners with each of the big tool vendors. There's three main tool vendors that the industry uses for EPI tools, we typically want to be kind of a arms dealer, work with whatever tool our customers want to work with. We have good relationships with all of them. The tool vendor that we have the strategic partnership with, we've been working with for more than a decade and had a good relationship with. Now that we've entered into the strategic partnership, the level of co-development work that we're doing is at a whole new level. We have weekly meetings with their engineering team where we are working on developing the test data that we need for marketing to customers.

As customers ask us questions and wanna get more demos, then we dig in and do work on that together. Yeah, on a engineering cooperation level, it's at a whole new level. The second area is on the marketing and sales to customers, and that's something that we've never really done with them in the past. That's where we would be, you know, developing the right materials for us to both go into target customers and talk about MST technology and what a good solution that is. Now, one thing I've calculated a number of times is that if we are successful licensing our technology to customers, in many cases the tool vendor is gonna make more money from us winning designs there than we will. There's obvious advantages for them making us successful.

They're not doing this out of the goodness of their heart. The good news is, I think they've recognized that in the last year since we started this, and we're really seeing the benefit as we're engaging with customers.

Okay. This is a follow-up kind of to the when would we be able to gauge Gate-All-Around custom engagement. An investor asked, commented that the last call sounded like 2026 we would see several deals being made. Is it safe to say that now that sounds unlikely, or is there still hope for inking an agreement this year?

We're only in the fifth month of the year, and I'm hopeful every month that we're gonna be inking deals. Definitely would say there's definitely a very strong chance.

You know, if you look at all the areas in which you know, are working, which of the segments do you think is closest to producing a royalty-bearing license?

I spoke a call or two ago about wafer-based products, and I think that, you know, the development effort in a wafer-based product is relatively easier. Some of the areas where we're offering wafer-based solutions are in gallium nitride and in RFSOI. There's, you know, we have wafer-based solutions that we're offering in the memory space. I think one of those could be the fastest. We also have been working on power and on RFSOI with customers for a very long time, so those could also be a quick time to market. It's, you know, very hard to call with so many moving pieces.

All right. With that, Scott, I'll turn the call to you for closing comments here.

Oh, okay. Well, I wanna just thank you all for joining us to hear the progress being made within Atomera. I hope you're feeling the excitement that we are. Please continue to look for our news, articles, and blog posts which are available along with investor alerts on our website, atomera.com. Should you have additional questions, please contact Mike Bishop, who'll be happy to follow up. Thanks again for your support, and we look forward to our next update call.

Thank you. This concludes the call.